1. Technical Field of the Invention
The present invention relates to a heterojunction bipolar transistor, and more particularly to a heterojunction bipolar transistor that is small in hFE variations while maintaining a high early voltage.
2. Description of Related Art
In recent years, in bipolar transistors formed using a silicon substrate, efforts have been made to attain higher speed and performance with the progress of submicron technology/self-alignment technology. In particular, SiGe heterojunction bipolar transistors (SiGe-HBTs) whose base layer is a SiGe layer made of mixed crystal of Si and Ge grown on a silicon substrate by epitaxy have been considered highly promising as bipolar transistors permitting further higher speed and performance compared with conventional Si homojunction bipolar transistors (Si-BJTs).
The reason for the above is as follows. Since the band gap of Ge (0.66 eV at room temperature) is smaller than that of Si (1.12 eV at room temperature), the band gap of SiGe mixed crystal is smaller than that of Si. Therefore, by using SiGe mixed crystal smaller in band gap than Si for the base layer, the energy barrier against holes injected from the base layer into the emitter layer can be made higher than the energy barrier against electrons injected from the emitter layer into the base layer. Thus, in the case that the impurity concentrations in the emitter layer and the base layer are made the same between a SiGe-HBT and a Si-BJT, the base current of the SiGe-HBT will be smaller than the base current of the Si-BJT, permitting increase in the current amplification (hFE) of the SiGe-HBT. SiGe-HBTs can be fabricated using a conventional Si submicron process except for growth of a SiGe epitaxial layer. It is therefore possible to attain higher performance while maintaining the merits (higher integration and lower cost) of the Si process over compound semiconductors such as GaAs. SiGe-HBTs are therefore useful, in particular, as devices meant for high-speed, high-frequency communication systems such as mobile phones and wireless LAN. Moreover, in recent years, SiGe-HBTs have received attention as output transistors in mobile phone systems, for which compound semiconductors typified by GaAs was conventionally adopted, due to the low-cost nature of SiGe.
Self-aligned bipolar transistors using polysilicon as extraction electrodes have been increasingly put into practical use in the high-frequency field as a transistor structure suitable for high-speed applications because of their easiness in reducing the parasitic capacitance with a fine process.
FIG. 9 is a cross-sectional view showing a general configuration of a conventional SiGe-HBT using polysilicon as an extraction electrode. FIG. 10 is a view showing a profile in the depth direction of the impurity concentrations in the emitter, base and collector and the Ge composition (Ge concentration) in SiGe mixed crystal in a section along line X-X in FIG. 9.
As shown in FIG. 9, an n+ collector buried layer 102, an n− collector layer 103, a non-doped SiGe spacer layer 104, a p− SiGe compositionally graded layer 105 and a non-doped Si-cap layer 106 are sequentially grown on a Si substrate 101 by epitaxy.
The non-doped SiGe spacer layer 104 and the p− SiGe compositionally graded layer 105 constitute an intrinsic base layer. The Ge content in the p− SiGe compositionally graded layer 105 gradually increases from the emitter side toward the collector side. This causes generation of an internal electric field in the p− SiGe compositionally graded layer 105, as shown in FIG. 11, allowing minority carriers (electrons) injected from the emitter layer into the base layer to be accelerated with the internal electric field. This shortens the base travel time, and thus a high frequency characteristic can be attained.
The non-doped SiGe spacer layer 104 and the p− SiGe compositionally graded layer 105 are doped with a minute amount (about 0.1 to 0.2 at %, for example) of carbon (C) atoms. The C atoms in the SiGe epitaxial layer can reduce lattice distortion, and also exert the effect of suppressing accelerated diffusion of B. The reason for this effect is that while the accelerated diffusion of B is known as occurring because interstitial Si generated in Si crystal and B are paired, C atoms have an action of effectively capturing interstitial Si.
A p+ extrinsic base layer 108 and a base polysilicon electrode 107 are formed in the SiGe layer surrounding the intrinsic base layers 104 and 105. An insulating film 112 having a hole is formed on the non-doped Si-cap layer 106, and an n+ emitter polysilicon electrode 110 is formed on the insulating film 112. An emitter diffusion layer 109 is formed on the surface of a portion of the Si-cap layer 106 with the n-type impurities in the emitter polysilicon electrode 110 driven therein by heat treatment. Silicide layers 113 are formed over the surfaces of the base polysilicon electrode 107 and the emitter polysilicon electrode 108, which are connected with metal electrodes 115 via contact plugs 114.
The emitter polysilicon electrode 110 is generally formed by decompressed CVD. Therefore, as shown in FIGS. 12A and 12B, natural oxide films 120 having a size of about 0.1 to 1.0 nm are formed unevenly at the interface between the Si-cap layer 106 and the emitter polysilicon electrode 110 due to cleaning before film formation, involved oxidation during film formation and the like. Such natural oxide films 120 pose an energy barrier against minority carriers (holes) injected from the base layer into the emitter layer, as shown in FIG. 11. The base current is therefore smaller at portions having such interface oxide films 120 than portions having no such interface oxide films. Thus, the base current of the entire transistor varies with the state of existence of the interface oxide films 120, causing a problem of hFE variations. In particular, as the area of the emitter opening is smaller, the unevenness becomes more influential and thus the hFE variations caused by the interface oxide films 120 become more significant. The relative variations between adjacent transistors also increase, and thus the circuit characteristics will be greatly affected.
To address the above problem, Japanese Laid-Open Patent Publication No. 6-69225 (Patent Document 1) discloses a method in which the interface oxide films 120 are partially destroyed by raising the heat treatment temperature during emitter drive-in (ball-up phenomenon) to thereby reduce the hFE variations caused by the interface oxide films 120.
To destroy the interface oxide films 120, heat treatment at about 1050 to 1150° C. is considered necessary to perform drive-in by rapid thermal annealing (RTA), for example. However, if heat treatment at 1000° C. or higher is performed, a SiGe epitaxial film, which has a distortion at the SiGe/Si interface intrinsically, will cause a defect such as crystal dislocation. It is therefore difficult to subject SiGe-HBTs to heat treatment at 1000° C. or higher after formation of a SiGe epitaxial layer. Also, even if the drive-in temperature is raised, it is impossible to completely eliminate the interface oxide films 120. This method therefore will provide no essential solution even though it may improve the degree of variations.
Japanese Laid-Open Patent Publication No. 2004-128343 (Patent Document 2) describes a method in which the concentration of C atoms introduced into the base layers 104 and 105 is increased to reduce the hFE variations caused by the interface oxide films 120. To state specifically, as shown in FIG. 13, the C doped into the base layer at a high concentration (about 0.5 to 1.0 at %, for example) acts as centers of recombination between electrons (injected from the emitter layer into the base layer) and holes in the base layer (neutral base recombination (NBR)). Therefore, as the C doping amount increases, the base current of the SiGe-HBT increases. This increase in base current due to NBR is irrelevant to the natural oxide films 120 at the interface between the emitter polysilicon electrode and the emitter diffusion layer. As the base current increases due to NBR resulting in increase in the proportion of the NBR-induced base current in the entire base current, therefore, the variations in base current due to the interface oxide films 120 will become relatively smaller. In other words, even though the degree of variations in base current due to the interface oxide films 120 remains the same, the entire variations in base current will become small because the entire base current is increased with NBR. As a result, the hFE variations can be reduced.
However, when high-concentration C is introduced into the base layer (with NBR), the early voltage is lower compared with when low-concentration (or no) C is introduced into the base layer (without NBR) as shown in FIG. 14. The reason for this problem is considered as follows.
FIGS. 15A and 15B illustrate expanse of depletion layers at the base/collector and emitter/base junctions with the emitter being grounded in a SiGe-HBT, where FIG. 15A shows the state during halts and FIG. 15B shows the state during operation. During operation, with increase in collector potential, a reverse bias is applied between collector/base, reducing the base width Wb of a neutral base layer (non-depleted electrically neutral region in the intrinsic base layer) (early effect). This reduces the total C content in the neutral base layer and thus reduces the base current using C as recombination centers. At this time, to keep the base current fixed, the base potential (Vbe) increases, which increases injection of minority carriers (electrons) from the emitter into the base, and thus increases the collector current. In other words, the collector current has collector voltage dependency caused by C recombination, in addition to the effect of normal reduction in base width Wb (early effect). Thus, the early voltage becomes lower compared with the case without NBR.
During the emitter drive-in, a large amount of interstitial Si is injected from the emitter polysilicon electrode 110 into the emitter diffusion layer 109, the Si-cap layer 106 and the p− SiGe compositionally graded layer (intrinsic base layer) 105. During this injection, accelerated diffusion of B occurs with the interstitial Si, allowing B in the intrinsic base layer 105 to expand toward the collector and emitter sides as shown in FIG. 17A. If regions low in B concentration are formed near the base/collector junction, the depletion layer will change greatly along with the collector potential in these regions. This will further worsen the decrease in early voltage due to NBR.
To solve the above problem, Japanese Laid-Open Patent Publication No. 2004-128344 (Patent Document 3) describes a method in which the p− SiGe compositionally graded layer 105 (B-doped layer) is doped with C at a high concentration (about 0.5 to 1.0 at %, for example) while the SiGe spacer layer 104 (B-non-doped layer) is doped with C at a low concentration (about 0.1 to 0.2 at %, for example), to thereby suppress the decrease in early voltage while reducing the hFE variations.
In other words, while the base current is increased with the high-concentration C in the p− SiGe compositionally graded layer (B-doped layer) 105 to thereby reduce the effect of the interface oxide films, the C concentration in the region into which B has expanded by the accelerated diffusion of B toward the collector side is reduced to thereby reduce the effect of NBR. In this way, it is possible to suppress the decrease in early voltage while reducing the hFE variations.